Some experience in reducing noise and electromagnetic interference.
(1) The use of low-speed chips does not require high-speed, high-speed chips used in key areas.
(2) A resistor can be serially used to reduce the rate of transition of the upper and lower edges of the control circuit.
(3) Try to provide some form of damping for relays, etc.
(4) Use the lowest frequency clock that meets the system requirements.
(5) The clock generator is as close as possible to the device that uses this clock. Quartz crystal oscillator housing should be grounded.
(6) Circle the clock area with the ground wire and keep the clock line as short as possible.
(7) The I/O driver circuit should be as close to the printed board as possible to allow it to leave the board as soon as possible. The signal entering the printed circuit board must be filtered, the signal from the high noise area must be filtered, and the signal reflection can be reduced by using the series termination resistor.
(8) The MCD must be connected to high, or grounded, or defined as an output. The integrated circuit must be connected to the power supply and must not be left unconnected.
(9) Don't leave unused input terminals of the gate circuit unconnected. Leave unused input terminals of the op amp's positive input grounded, and connect the negative input terminal to the output terminal.
(10) The printed board should use the 45-fold line instead of the 90-fold line in order to reduce the external emission and coupling of high-frequency signals.
(11) The printed board is zoned according to the frequency and current switching characteristics. The noise components are further away from non-noise components.
(12) The single-point and double-sided single-point power supply and single-point grounding, power line, and ground line are as thick as possible, and the economy is able to withstand the use of multilayer boards to reduce the power and ground inductance.
(13) Keep the clock, bus, and chip select signals away from the I/O lines and connectors.
(14) Analog voltage input lines and reference voltage terminals should be kept away from digital circuit signal lines, especially clocks.
(15) For A/D devices, the digital part and the analog part should be unified and do not cross.
(16) The clock line is less disturbing than the parallel I/O line perpendicular to the I/O line, and the clock component pins are far away from the I/O cable.
(17) The component pins should be as short as possible and the decoupling capacitor pins should be as short as possible.
(18) The key lines should be as thick as possible and be protected on both sides. High-speed lines should be short straight.
(19) Noise-sensitive lines should not be paralleled with high-current, high-speed switching lines.
(20) Do not route under quartz crystals and under noise-sensitive devices.
(21) Weak signal circuit, no current loop is formed around the low frequency circuit.
(22) Do not loop any signal. If it is unavoidable, make the loop area as small as possible.
(23) One decoupling capacitor per integrated circuit. A small high-frequency bypass capacitor must be added to each electrolytic capacitor.
(24) Use large-capacity tantalum capacitors or poly capacitors instead of electrolytic capacitors to charge and discharge storage capacitors. When using a tubular capacitor, the housing must be grounded
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